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Now showing items 1 - 6 of 6

  • A LOW-PHASE-NOISE CMOS VCO FOR K-BAND APPLICATION

    Yeh, Mei-Ling   Lin, Yao-Chian   Chang, Chung-Cheng  

    A new high figure-of-merit (FOM) and low-phase-noise 20.73-GHz voltage-controlled oscillator is designed for K-band applications in this paper. The capacitive feedback technique is used for the low-phase-noise VCO design. The VCO can be tuned from 20.817 GHz to 20.266 GHz. The measured phase noise is -115.57 dBc/Hz at 1 MHz offset from the carrier frequency. The corresponding FOM is calculated to be -190 dBc/Hz. The VCO is implemented with the TSMC 0.18 mu m one-poly-six-metal 1.7V mixed-signal/RF CMOS technology, and the chip size is 0.51 x 0.74 mm(2).
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  • A low-phase noise and wide-tuning range CMOS voltage controlled oscillator

    Lin, Yao-Chian   Yeh, Mei-Ling  

    A wide-tuning range and ultra-low-phase-noise 4.28-GHz voltage controlled oscillator (VCO) is designed in this article. The VCO implemented with the TSMC 0.18 mu m 1P6M CMOS technology uses NMOSs only. Source capacitive degeneration technique is used to increase the frequency tuning range. The proposed VCO can have an 18.94% tuning range from 3.53 to 4.34 GHz. The measured phase noise is -131.2 dBc/Hz at 1-MHz offset from the 4.28 GHz. The corresponding figure-of-merit (FOM) and FOMT are calculated to be -191.6 and -197.15 dBc/Hz, respectively. The chip size is 0.571 x 0.822 mm2. The core circuit consumes 16.5-mW and 1.3-V power supply. (C) 2012 Wiley Periodicals, Inc. Microwave Opt Technol Lett 54:19411944, 2012; View this article online at wileyonlinelibrary.com. DOI 10.1002/mop.26950
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  • A LOW-PHASE-NOISE CMOS QUADRATURE VCO WITH PMOS BACK-GATE COUPLING

    Yeh, Mel-Ling   Lin, Yao-Chian   Liou, Wan-Rone   Kuo, Sheng-Hing   Roblin, Patrick   Chang, Chung Cheng  

    A new PMOS backgate quadrature voltage controlled oscillator (QVCO) is designed and implemented using TSMC 0.18 mu m 1P6M CMOS technology. The phase noise of the PMOS hack-gate coupled QVCO operating at 1.5 V is measured to be -100 dBc/Hz and -125.08 dBc/Hz at 100 KHz and 1 MHz offset, respectively, for a low power consumption of 15 mW. The backgate QVCO demonstrates a wide frequency tuning range, a low phase noise, and a low power consumption. The corresponding figure-of-merit of the QVCO is -186 dBc/Hz. (C) 2010 Wiley Periodicals, Inc. Microwave Opt Technol Lett 52:2682-2685, 2010: View this article online at wileyonlinelibrary.com. DOI 10.1002/mop.25564
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  • HIGH-PERFORMANCE LOW-POWER 27-GHz CMOS VOLTAGE-CONTROLLED OSCILLATOR FOR Ka-BAND APPLICATIONS

    Yeh, Mei-Ling   Lin, Yao-Chian   Chang, Chung-Cheng  

    A new low-power 27.07-GHz voltage controlled oscillator is designed for Ka-band applications in this article. Body bias technique is used for the low-power and low-phase noise VCO design. The VCO can be tuned from 26.35 to 27.102 GHz. The measured phase noise is -106.2 dBc/Hz at 1 MHz offset from the carrier frequency. The corresponding figure-of-merit (FOM) is calculated to be -183.2 dBc/Hz. The VCO is implemented with the TSMC 0.18 mu m one-poly-six-metal 1.5 V mixed signal/RF CMOS technology. The chip size is 0.565 x 0.69 mm(2). (C) 2011 Wiley Periodicals, Inc. Microwave Opt Technol Lett 53: 2872-2875, 2011; View this article online at wileyonlinelibrary.com. DOI 10.1002/mop.26433
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  • [IEEE 2006 International Conference on Communications, Circuits and Systems - Guilin, Guangzi, China (2006.06.25-2006.06.28)] 2006 International Conference on Communications, Circuits and Systems - An Low Power Ultra-Wideband CMOS LNA for 3.1~8.2-GHz Wireless Receivers

    Lin, Yao-chian   Liou, Wan-rone   Ho, Jyh-jier   Yeh, Mei-ling  

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  • An low power ultra-wideband CMOS LNA for 3.1-8.2-GHz wireless receivers

    Lin, Yao-Chian   Liou, Wan-Rone   Ho, Jyh-Jier   Yeh, Mei-Ling  

    This paper presents an ultra-wideband (UWB) 3.1 similar to 8.2-GHz low- noise amplifier design. Rresistive shunt-feedback method is used to provide wideband input matching and low noise figure (NF). The cascade configuration is employed with the inductive source degeneration and an input three-section band-pass Chebyshev filter. The LNA operates at 1.5 Volt and consumes 16.2mW. At 3.1 similar to 8.2-GHz, this LNA has NF of 3.6dB, with(-)input return loss of -12.155 dB, output return loss of -12.75 dB, and power gain of 11.43dB. The circuit is designed with TSMC 0.18um single-poly-six-metal CMOS process.
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