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Now showing items 1 - 16 of 1319

  • Intra-block copying enhancements for HEVC in-range-extension (RExt)

    High efficiency video coding (HEVC) enhancements are described for intrablock copying for reducing motion vector (MV) coding redundancy and enhancing in range extensions (RExt) by selecting a default block my predictor. In reducing MV data redundancy, the value of MVx and/or MVy can have a baseline at the width (W), or height (H) of the respective block, whereby fewer bits need to be encoded. One embodiment for enhancing RExt provides an improved selection of a default block vector predictor for the first CU performing intra-block copying in a CTU.
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  • Flexible band offset mode in sample adaptive offset in HEVC

    A Flexible Band Offset (FBO) apparatus and method of performing Sample Adaptive Offset (SAO) filtering within encoders and decoders, such as according to the High Efficiency Video Coding (HEVC) standard, and similarly configured coding devices. The number of Band Offset (BO) modes and the number of necessary offsets is reduced. The invention beneficially provides simpler coding, reduces temporary buffer size requirements, and can yield a small performance gain over existing SAO techniques of HEVC test model HM 5.
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  • Base color merging for multi-stage base color and index map (MBCIM) for RExt

    An enhancement for removing signaling redundancy of base color within multi-stage base color and index map (MBCIM) processing of HEVC for computer generated screen content is presented. Redundancy is removed in response to determining and setting merge flags when neighboring pixels are coded and available. During coding of pixels in the current CU, then color are copied from the neighboring blocks when a merge flag is set, or the pixel is coded as it was previously.
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  • Strained Ge-on-insulator structure and method for forming the same

    A strained Ge-on-insulator structure is provided, comprising: a silicon substrate, in which an oxide insulating layer is formed on a surface of the silicon substrate; a Ge layer formed on the oxide insulating layer, in which a first passivation layer is formed between the Ge layer and the oxide insulating layer; a gate stack formed on the Ge layer; and a channel region formed below the gate stack, and a source and a drain formed on sides of the channel region, in which the source and the drain are a SixGe1-x:C source and a SixGe1-x:C drain respectively to produce a tensile strain in the channel region, in which x is within a range from 0 to 1 and a content of C is within a range from 0 to 7.5%. Further, a method for forming the strained Ge-on-insulator structure is also provided.
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  • Intra-block copying enhancements for HEVC in-range-extension (RExt)

    High efficiency video coding (HEVC) enhancements are described for intra-block copying for reducing motion vector (MV) coding redundancy and enhancing in range extensions (RExt) by selecting a default block my predictor. In reducing MV data redundancy, the value of MVx and/or MVy can have a baseline at the width (W), or height (H) of the respective block, whereby fewer bits need to be encoded. One embodiment for enhancing RExt provides an improved selection of a default block vector predictor for the first CU performing intra-block copying in a CTU.
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  • Apparatuses and methods for transistor protection by charge sharing

    Apparatuses and methods for protecting transistors through charge sharing are disclosed herein. An example apparatus includes a transistor comprising a gate node and a bulk node, a charge sharing circuit coupled between the gate and bulk nodes, and logic. The charge sharing circuit is configure to equalize charge differences between the gate and bulk nodes, and the logic is configured to enable the charge sharing circuit based at least in part on a combination of first and second signals, which indicate the presence of a condition.
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  • Strained Ge-on-insulator structure and method for forming the same

    A strained Ge-on-insulator structure is provided, comprising: a silicon substrate, in which an oxide insulating layer is formed on a surface of the silicon substrate; a Ge layer formed on the oxide insulating layer, in which a first passivation layer is formed between the Ge layer and the oxide insulating layer; a gate stack formed on the Ge layer, a channel region formed below the gate stack, and a source and a drain formed on sides of the channel region; and a plurality of shallow trench isolation structures extending into the silicon substrate and filled with an insulating dielectric material to produce a strain in the channel region. Further, a method for forming the strained Ge-on-insulator structure is also provided.
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  • Video coding system with search range and method of operation thereof

    A video coding system, and a method of operation thereof, includes: a source input module for receiving a frame from a video source; and a picture process module, coupled to the source input module, for generating a reference coding unit in the frame; for generating an intra copy motion vector pointing to the reference coding unit within a search range, wherein the search range does not include an upper coding tree unit of the frame; for generating a current coding unit based on the intra copy motion vector; and for generating a video bitstream based on the current coding unit for a video decoder to receive and decode for displaying on a device.
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  • Low-dropout regulator with dynamic pole tracking circuit for improved stability

    A low-dropout regulator, including: a dynamic pole tracking circuit having an active load, a voltage-to-current converter, a current amplifier, a bias circuit, a regulating transistor, a first feedback resistor, a second feedback resistor, and a first capacitor. The dynamic pole tracking circuit includes: a first PMOS, a second PMOS, a first resistor, and a second resistor. The voltage-to-current converter includes: a first NMOS, a second NMOS, a third NMOS, a fourth NMOS, a fifth NMOS, a sixth NMOS, a seventh NMOS, an eighth NMOS, a third PMOS, a fourth PMOS, a seventh PMOS, an eighth PMOS. The current amplifier includes: a fifth PMOS, a sixth PMOS, a ninth NMOS, a tenth NMOS, and a third resistor. The bias circuit includes: a ninth PMOS, a tenth PMOS, an eleventh PMOS, an eleventh NMOS, a twelfth NMOS, a thirteenth NMOS, and a fourth resistor.
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  • Flexible band offset mode in sample adaptive offset in HEVC

    A Flexible Band Offset (FBO) apparatus and method of performing Sample Adaptive Offset (SAO) filtering within encoders and decoders, such as according to the High Efficiency Video Coding (HEVC) standard, and similarly configured coding devices. The number of Band Offset (BO) modes and the number of necessary offsets is reduced. The invention beneficially provides simpler coding, reduces temporary buffer size requirements, and can yield a small performance gain over existing SAO techniques of HEVC test model HM 5.
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  • Method and apparatus for detecting a preamble in a received signal

    This invention discloses a method and an apparatus for reducing false alarm rate in preamble detection due to discontinuities between successive symbols in a received signal. The invention is usable in, e.g., a LTE compliant system. In one embodiment, the apparatus includes a filter for filtering the received signal to yield a filtered signal, and a correlator for correlating the filtered signal with a predetermined preamble. The apparatus further comprises a first multiplier for modifying the received signal before it is filtered, or a second multiplier for modifying the filtered signal before it is correlated, or both. The first multiplier multiplies the received signal with a first time-domain window function configured to substantially smooth discontinuities at symbol boundaries in the received signal. The second multiplier multiplies the filtered signal with a second time-domain window function configured to substantially suppress spikes present in the filtered signal around the symbol boundaries.
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  • Tunneling field effect transistor having a lightly doped buried layer

    A tunneling field effect transistor and a method for fabricating the same are provided. The tunneling field effect transistor includes: a semiconductor substrate and a drain layer formed in the semiconductor substrate, in which the drain layer is first type heavily doped; an epitaxial layer formed on the drain layer, with an isolation region formed in the epitaxial layer; a buried layer formed in the epitaxial layer, in which the buried layer is second type lightly doped; a source formed in the buried layer, in which the source is second type heavily doped; a gate dielectric layer formed on the epitaxial layer, and a gate formed on the gate dielectric layer; and a source metal contact layer formed on the source, and a drain metal contact layer formed under the drain layer.
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  • Bootstrapping from a remote disk image via a network

    A method of bootstrapping from a remote image file comprising loading, by a processor, an initial bootloader, employing the initial bootloader to download a final bootloader from the remote image file via a network, employing the final bootloader to mount the remote image file as a block device, downloading a kernel and root file system mounting data from the remote image, and executing the kernel to bootstrap the processor based on the root file system mounting data.
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  • Optimal open loop power control for random access channel

    A user terminal includes a processing device and a memory storage device. The user terminal is programmed to receive a forward link signal from at least one of a plurality of network devices and transmit a return link signal to the plurality of network devices. The user terminal is further programmed to select one of the plurality of network devices and transmit the return link signal to the selected one of the plurality of network devices at an optimized return link signal transmission strength. The network device is programmed to receive the return link signal from at least one of a plurality of user terminals, determine an initial offset associated with the return link signal, and transmit the initial offset and an original forward pilot to total transmit power ratio over a broadcast channel to the at least one of the plurality of user terminals.
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  • Ge-on-insulator structure and method for forming the same

    A method for forming a Ge-on-insulator structure is provided, comprising steps of: forming a Ge layer (1200) on a substrate (2000); treating a first surface of the Ge layer (1200) to form a first semiconducting metal-germanide passivation layer (1300); bonding the first semiconducting metal-germanide passivation layer (1300) with a silicon substrate (1100), wherein on a surface of the silicon substrate (1100) an oxide insulating layer is formed; and removing the substrate (2000). Further, a Ge-on-insulator structure formed by the method is also provided.
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  • Control information transmission method and sending and receiving device

    Disclosed are a method for transferring control information, a transmitting device and a receiving device, the method includes that: a transmitting end orderly selects an element yn or two elements y2m−1, y2m, from a sequence Y to be modulated corresponding to control information B newly added, then it selects pairing elements x2p−1, x2p from a sequence X to be modulated corresponding to related control information A, and groups yn or y2m−1, y2m and the x2p−1, x2p into an element group (x2p−1, x2p, yn) or (x2p−1, x2p, y2m−1, y2m) and maps (x2p−1, x2p, yn) or (x2p−1, x2p, y2m−1, y2m) as specified constellation points of a specified constellation diagram, and takes the constellation points as modulation symbols; it takes each two elements in the elements of the sequence X which are not used for pairing as an element group to perform QPSK modulation, modulating into QPSK modulation symbols; and it maps the constellation points and the QPSK modulation symbols to part of or all resources occupied by a corresponding control channel to be transmitted.
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