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Now showing items 1 - 8 of 8

  • An analytical calculation for lowest forward voltage of PiN diodes

    Terashima, Tomohide  

    This article reports the lowest forward voltage and its condition for PiN diodes by analytical calculation for the first time. We take account of current balance between conductivity modulation in i-layer and out flowing diffusion current at the both ends of i-layer for this estimation, whose accuracy is verified by comparisons with the device simulation results. We employ R (total resistance of PiN diode) x Q (stored carrier in i-layer) to evaluate the carrier distribution for forward voltage (V), and we confirm that V is minimized at flat carrier distribution. Moreover, we found that V of the flat carrier profile is more minimized to the lowest limit at certain physical properties of the p(+) layer and n(+) layer at the both ends of the i-layer. We propose silicon bipolar limit that is trade-off between blocking voltage and resistance with conductivity modulation as contrasted with the silicon limit for single-carrier devices. (c) 2019 Institute of Electrical Engineers of Japan. Published by John Wiley & Sons, Inc.
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  • Characterization and Modeling of a 1.2-kV 30-A Silicon-Carbide MOSFET

    Mukunoki, Yasushige   Nakamura, Yuta   Horiguchi, Takeshi   Kinouchi, Shin-ichi   Nakayama, Yasushi   Terashima, Tomohide   Kuzumoto, Masaki   Akagi, Hirofumi  

    This paper describes a novel compact model for a SiC-MOSFET. The model is useful to achieve accurate simulation of output characteristics from a linear region to a saturation region, selecting both gate-source voltage and temperature as parameters. In order to construct the model systematically, attention is paid to a physics-based modeling procedure with channel mobility as an adjustable parameter. The model also features characterization and modeling of an internal drain-gate capacitor. The model shows fairly good agreement in the output characteristics and the dynamic behavior of both gate drive circuit and main power circuits between the experimental and simulated results. This successful validation indicates that this model offers a promising circuit-based simulation tool for designing whole power conversion systems using SiC-MOSFETs.
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  • High-Voltage Integrated Circuits:History,State of the Art,and Future Prospects

    Disney, Don   Letavic, Ted   Trajkovic, Tanya   Terashima, Tomohide   Nakagawa, Akio  

    High-voltage ICs (HVICs) are used in many applications, including ac/dc conversion, off-line LED lighting, and gate drivers for power modules. This paper describes the technologies most commonly used in commercial HVICs, including junction-isolation, thin silicon-on-insulator (SOI), and thick SOI approaches. Emerging technologies such as thin silicon membrane are also discussed.
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  • SEMICONDUCTOR DEVICE MANUFACTURING METHOD AND SEMICONDUCTOR MANUFACTURING APPARATUS

    This semiconductor device manufacturing method is provided with: a step wherein a plurality of subjects to be processed are disposed on a first tray and a second tray in contact with the first tray; a plurality of irradiation steps wherein, while discharging an irradiation material from an irradiation apparatus formed directly above the contact position where the first tray and the second tray are in contact with each other, the irradiation apparatus is swung in the first direction, i.e., the direction traversing the contact position, and the first tray and the second tray are moved in the second direction perpendicular to the first direction, thereby having the subjects to be processed repeatedly irradiated with the irradiation material a plurality of times; and an interchanging step, which is performed at least once between the irradiation steps, and in which the position of the first tray and that of the second tray are interchanged without changing the moving direction of the first tray and the second tray, said direction being the second direction.
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  • [IEEE 19th International Symposium on Power Semiconductor Devices and IC\"s - Jeju, Korea (2007.05.27-2007.05.31)] Proceedings of the 19th International Symposium on Power Semiconductor Devices and IC\"s - Configuration of JI-LIGBT for Over 100 kHz Switching

    Terashima, Tomohide   Moritani, Junichi  

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  • Trench-Isolated High-Voltage IC with Reduced Parasitic Bipolar Transistor Action

    Takahashi, Tetsuo   Terashima, Tomohide   Moritani, Junichi  

    For high-voltage IC device; one of the important issues is to prevent parasitic transistor acting; especially in Junction-Isolation (JI) device. In addition to this problem; it is necessary to achieve it by a minimum cost. In this paper; we propose junction-isolated HVIC using deep trench-isolation techniques. And we examined about structures of reducing parasitic transistor action by simulation and experiments. In proposed structures; the area of isolation is reduced to 2/3 to 1/2 compared with conventional junction isolation. Moreover; significant reduction of hFE of parasitic transistor in logic transistors and HV-transistor are confirmed.
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  • Configuration of JI-LIGBT for Over 100 kHz Switching

    Terashima, Tomohide   Moritani, Junichi  

    We have investigated into following measures to improve the switching performance of L-IGBT. 1. Passive PMOS. 2. N; layer inside a p-type collector. 3. Wafer thinning. In particular, wafer thinning has brought remarkable improvement of switching performance on L-IGBT as the passive PMOS that we had proposed. Furthermore, we have fabricated a prototype IPD (Intelligent Power Device) that we applied these measures, and a flyback converter controlled by the IPD has well demonstrated 150kHz operation.
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  • A Novel Driving Technology for a Passive Gate on a Lateral-IGBT

    Terashima, Tomohide  

    This paper presents a novel technology for automatic driving of the passive PMOS to improve a Lateral-IGBT switching performance. Though the former technology, which we had introduced [4, 5], has very simple driving circuitry, it still needs some additional process or structural change. The novel technology eliminates these remained problems without decrease in device performance. Simulation results indicate advantage of the novel technology in total performance compared with results of the former technology. Besides, experimental results of the prototype IPD with the novel technology have indicated improved switching performance distinctly.
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