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Now showing items 1 - 3 of 3

  • A 1.25MS/s Two-Step Incremental ADC with 100dB DR and 110dB SFDR

    Katayama, Takato   Miyashita, Shiko   Sobue, Kazuki   Hamashita, Koichi  

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  • Ring Amplifiers for Switched Capacitor Circuits

    Hershberg, Benjamin   Weaver, Skyler   Sobue, Kazuki   Takeuchi, Seiji   Hamashita, Koichi   Moon, Un-Ku  

    In this paper the fundamental concept of ring amplification is introduced and explored. Ring amplifiers enable efficient amplification in scaled environments, and possess the benefits of efficient slew-based charging, rapid stabilization, compression-immunity (inherent rail-to-rail output swing), and performance that scales with process technology. A basic operational theory is established, and the core benefits of this technique are identified. Measured results from two separate ring amplifier based pipelined ADCs are presented. The first prototype IC, a simple 10.5-bit, 61.5 dB SNDR pipelined ADC which uses only ring amplifiers, is used to demonstrate the core benefits. The second fabricated IC presented is a high-resolution pipelined ADC which employs the technique of Split-CLS to perform efficient, accurate amplification aided by ring amplifiers. The 15-bit ADC is implemented in a 0.18 mu m CMOS technology and achieves 76.8 dB SNDR and 95.4 dB SFDR at 20 Msps while consuming 5.1 mW, achieving a FoM of 45 fJ/conversion-step.
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  • A 951-fs(rms) Period Jitter 3.2% Modulation Range in-Band Modulation Spread-Spectrum Clock Generator

    Sun, Hyuk   Sobue, Kazuki   Hamashita, Koichi   Anand, Tejasvi   Moon, Un-Ku  

    A spread-spectrum clock generator is proposed based on an in-band phase modulation. In a charge-pump phase-locked loop configuration, the input phase modulation signal is applied to the proposed charge-based discrete-time loop filter. The phase difference between the input phase modulation signal and the output clock feedback phase is sampled and applied to the control voltage of an oscillator. The loop gain of the clock generator pushes the output clock phase to accurately trace the input phase modulation signal. This article achieves 3.2% spread-spectrum modulation range and 26.51-dB spread-spectrum attenuation at 352-MHz output frequency using a 2-MHz reference frequency. The in-band modulation improves a design sensitivity, and a 298-ppm modulation range error is measured with over 140% K-VCO perturbations. This spread-spectrum clock generator is implemented in a 0.18-mu m CMOS, and achieves 951-fs(rms) period jitter while consuming 9.98 mW from a 1.8-V power supply.
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