Seifried, Marc
Villares, Gustavo
Baumgartner, Yannick
Hahn, Herwig
Halter, Mattia
Horst, Folkert
Caimi, Daniele
Caer, Charles
Sousa, Marilyne
Dangel, Roger Franz
Czornomaz, Lukas
Offrein, Bert Jan
CMOS-compatible III-V lasers integrated on silicon are a crucial step to reduce power consumption and cost for nextgeneration optical transceivers. Here, we demonstrate a concept to co-integrate III-V lasers into a CMOS Silicon Photonics platform, in which lasers, photonics, and electronic circuitry share the same back end of line. Based on a bonded III-V epitaxial layer stack, ultra-thin laser devices, optically pumped lasing and coupling to silicon are demonstrated. Furthermore, we present all building blocks for electrically pumped laser devices.
Weiss, Jonas
Jubin, Daniel
Meier, Norbert
Offrein, Bert Jan
Oggioni, Stefano
Rietveld, Willy
Duis, Jeroen
Spoor, Cor
Smink, Rutger
Dorrestein, Sander
Herb, Bill
Bowen, Terry
Cormany, Dave
We present a versatile electro-optical packaging platform for optical transceiver modules suitable for very high aggregate I/O capacity, as required, for example, in (disaggregated) datacenters and servers. Real-estate limitations on the board or on the processor package laminate are overcome by using a flexible printed circuit board substrate that is folded around a solid body, resulting in a 3-D package assembly. A 48 Gb/sx10 Gb/s transceiver prototype is demonstrated as well as the design path toward a transceiver with 1.2-Tb/s aggregate I/O bandwidth. Accounting for large-scale manufacturing and deployment, we explicitly address the requirements of the optical, mechanical, thermal, and electrical interfaces as well as of all associated manufacturing processes.
Halter, Mattia
Begon-Lours, Laura
Bragaglia, Valeria
Sousa, Marilyne
Offrein, Bert Jan
Abel, Stefan
Luisier, Mathieu
Fompeyrine, Jean
Neuromorphic computing architectures enable the dense colocation of memory and processing elements within a single circuit. This colocation removes the communication bottleneck of transferring data between separate memory and computing units as in standard von Neuman architectures for data-critical applications including machine learning. The essential building blocks of neuromorphic systems are nonvolatile synaptic elements such as memristors. Key memristor properties include a suitable nonvolatile resistance range, continuous linear resistance modulation, and symmetric switching. In this work, we demonstrate voltage-controlled, symmetric and analog potentiation and depression of a ferroelectric Hf0.57Zr0.43O2 (HZO) field-effect transistor (FeFET) with good linearity. Our FeFET operates with low writing energy (fJ) and fast programming time (40 ns). Retention measurements have been performed over 4 bit depth with low noise (1%) in the tungsten oxide (WOx) readout channel. By adjusting the channel thickness from 15 to 8 nm, the on/off ratio of the FeFET can be engineered from 1 to 200% with an on-resistance ideally >100 k Omega, depending on the channel geometry. The device concept is using earth-abundant materials and is compatible with a back end of line (BEOL) integration into complementary metal-oxide-semiconductor (CMOS) processes. It has therefore a great potential for the fabrication of high-density, large-scale integrated arrays of artificial analog synapses.
Boersma, Arjen
Wiegersma, Sjoukje
Offrein, Bert Jan
Duis, Jeroen
Delis, Jos
Ortsiefer, Marcus
van Steenberge, Geert
Karpinen, Mikko
van Blaaderen, Alfons
Corbett, Brian
The increasing request for higher data speeds in the information and communication technology leads to continuously increasing performance of microprocessors. This has led to the introduction of optical data transmission as a replacement of electronic data transmission in most transmission applications longer than 10 meters. However, a need remains for optical data transmission for shorter distances inside the computer. This paper gives an overview of the Joint European project FIREFLY, in which new polymer based single mode waveguides are developed for integration with VCSELs, splitters and fibers that will be manufactured using multi-layer nanoimprint lithography (NIL). Innovative polymers, new applications of nano-technology, new methods for optical coupling between components, and the integration of all these new components are the technical ingredients of this ambitious project. New polymers: developments in siloxane based polymers will be discussed to reduce the optical loss at datacom and telecom wavelengths. These new polymers can already be processed using processes such as direct laser writing. New production processes: the implementation of the new polymers in multi-layer NIL will be assessed. The polymer cladding and core is structured at micrometer scale to create dense networks of single mode waveguides. The NIL process is a suitable technique for mass production. Integration: new concepts will be presented that will optimize the coupling of the components and reduce the optical losses that arise in coupling the lasers to waveguides, waveguides to fibres, and in 45 or 90 bends.
A semiconductor structure (1) comprises a processed semiconductor substrate (2) including active electronic components (3); a dielectric layer (4) covering at least partially the processed semiconductor substrate (2, 3); an interface layer (5) which is suitable for growing optically active material on the interface layer, wherein the interface layer (5) is bonded to the dielectric layer (4); wherein the optical gain layer (5) and the processed semiconductor substrate (2, 3) are connected through the dielectric layer (4) by electric and/or optical contacts (6). A method for fabricating a semiconductor structure (1) comprises: providing (S1) a processed semiconductor substrate (2) including active electronic components (3); depositing (S2) a dielectric layer (4) covering at least partially the processed semiconductor substrate (2, 3); bonding (S4) an interface layer (5) to the dielectric layer (4), wherein the interface layer (5) is suitable for growing optically active material on the interface layer; and connecting (S7) the interface layer (5) and the processed semiconductor substrate (2, 3) with each other through the dielectric layer (4) by electric and/or optical contacts (6).
La Porta, Antonio
Weiss, Jonas
Dangel, Roger
Jubin, Daniel
Meier, Norbert
Horst, Folkert
Offrein, Bert Jan
We present optical coupling schemes for silicon integrated photonics circuits that account for the challenges in large-scale data processing systems such as those used for emerging big data workloads. Our waveguide based approach allows to optimally exploit the on-chip optical feature size, and chip-and package real-estate. It further scales well to high numbers of channels and is compatible with state-of-the-art flip-chip die packaging. We demonstrate silicon waveguide to polymer waveguide coupling losses below 1.5 dB for both the O- and C-bands with a polarisation dependent loss of < 1 dB. Over 100 optical silicon waveguide to polymer waveguide interfaces were assembled within a single alignment step, resulting in a physical I/O channel density of up to 13 waveguides per millimetre along the chip-edge, with an average coupling loss of below 3.4 dB measured at 1310 nm.
Anzures, Ed
Dangel, Roger
Beyeler, Rene
Cannon, Allie
Horst, Folkert
Kiarie, Cecilia
Knudsen, Phil
Meier, Norbert
Moynihan, Matt
Offrein, Bert Jan
Formulations containing silicon-based polymers have been used for the formation of planar waveguides on flexible substrates. The substrate of choice is compatible with the flexible waveguide and is made of materials commonly utilized in the printed circuit board industry. When the flexible waveguide material is combined with the chosen substrate using processes compatible with printed circuit board manufacturing techniques, the resultant optical interconnects display sufficient flexibility, low optical loss (<0.05 dB/cm at 850 nm), and high reliability.
Lamprecht, Tobias
Beyeler, Rene
Dangel, Roger
Horst, Folkert
Jubin, Daniel
Meier, Norbert
Weiss, Jonas
Offrein, Bert Jan
We report on micro-mirrors integrated in optical polymer waveguides. The mirrors are fabricated prior to the waveguide core definition step and are based on a selective wet-chemical metallization process.
Mai, Lijian
Ding, Fei
Stoeferle, Thilo
Knoll, Armin
Offrein, Bert Jan
Mahrt, Rainer F.
We report on the realization of a solid state Fabry-Perot-like microcavity that uses a small Gaussian-shaped deformation inside the cavity to achieve strong lateral photon confinement on the order of the wavelength. Cavities with a mode volume V < 0.4 mu m(3) and a quality factor Q > 1000 are fabricated by means of focused ion beam milling, removing the necessity for etched sidewalls as required for micropillar cavities. Perylene-diimide dye doped polystyrene was embedded in the microcavity and probed by time-resolved microphotoluminescence. A Purcell enhancement of the spontaneous emission rate by a factor of 3.5 has been observed at roomtemperature. (C) 2013 AIP Publishing LLC.
The invention is directed to a method for fabricating an optical waveguide (100). Basically, it relies on setting on the lower cladding(11), both the waveguide cores (26L–48l) and light-reflecting features (23 –23c), e.g. mirrors or fiducial markers. The reflecting features and the waveguide cores constitute a core layer having an open structure. An upper cladding polymer (31) is then applied, which embeds the light-reflecting features and the waveguides. Thus, the upper cladding applied fills the space left vacant by the open structures. The components of the core layer are accordingly set in place during the fabrication process, before filling the cladding at the level at which they are located. Since the light reflecting features and waveguide cores can be set with high accuracy on the lower cladding (before applying the upper cladding), the problems of reworking (e.g. dicing) or refining position of a light-reflecting feature inserted a posteriori is circumvented. Advantageously, both the waveguide cores and reflecting feature scan be patterned onto the lower cladding. The reflecting features may further be obtained from a selective metallization process.
Horst, Folkert
Green, William M. J.
Offrein, Bert Jan
Vlasov, Yurii A.
We present ultracompact integrated optical echelle grating wavelength-division-multiplexing (de) multiplexers for on-chip optical networks, fabricated using high-index-contrast silicon-on-insulator photonic waveguide technology. These devices are based on a design with two stigmatic points, which enables compact geometries with reduced aberrations. In the example presented here, this design allows us to achieve an eight-channel (de) multiplexer with 3.2-nm channel spacing, within an ultracompact footprint of 250 x 200 m. The channel-to-channel isolation of the devices is 19 dB. The minimum insertion loss, relative to a straight waveguide, is 3 dB with a channel-to-channel variation of 0.5 dB.
The invention notably concerns a method for assembling flexible optical waveguide ribbons (Rn). Basically, optical waveguide ribbons are first positioned in a spacer (Sp), such that one ribbon is stacked on another one. Then, a given ribbon is constrained in a respective calibrated space (SpRn) ofthe spacer, before being fixed. Accordingly, the fabrication tolerances of individual waveguide ribbons do not sum-up along the stack. Constraining the layers can for instance be set and/or reinforced by means of an adhesive, e.g. by filling in a space left vacant in the spacer after positioning the elements. The other way round, requirements for individual layer thickness control can be relaxed. Remarkably, the various layers can be positioned e.g. all at once or one by one, according to embodiments described.
Pitwon, Richard C. A.
Wang, Kai
Graham-Jones, Jasper
Papakonstantinou, Ioannis
Baghsiahi, Hadi
Offrein, Bert Jan
Dangel, Roger
Milward, Dave
Selviah, David R.
The protocol data rate governing data storage devices will increase to over 12 Gb/s by 2013 thereby imposing unmanageable cost and performance burdens on future digital data storage systems. The resulting performance bottleneck can be substantially reduced by conveying high-speed data optically instead of electronically. A novel active pluggable 82.5 Gb/s aggregate bit rate optical connector technology, the design and fabrication of a compact electro-optical printed circuit board to meet exacting specifications, and a method for low cost, high precision, passive optical assembly are presented. A demonstration platform was constructed to assess the viability of embedded electro-optical midplane technology in such systems including the first ever demonstration of a pluggable active optical waveguide printed circuit board connector. High-speed optical data transfer at 10.3125 Gb/s was demonstrated through a complex polymer waveguide interconnect layer embedded into a 262 mm x 240 mm x 4.3 mm electro-optical midplane. Bit error rates of less than and optical losses as low as 6 dB were demonstrated through nine multimode polymer waveguides with an aggregate data bandwidth of 92.8125 Gb/s.
Berger, Christoph
Offrein, Bert Jan
Schmatz, Martin
Optical interconnects have gradually replaced electrical interconnects in the long-distance telecom, local-area, and rack-to-rack link classes. We believe that this transition will also happen in the card-backplane-card datacom link class, both for bandwidth* length reasons and for density reasons. In analogy to the transition from individually wired boards to integrated printed circuit boards, we believe that eventually board-level optical interconnects will be based on an integrated technology such as board-embedded waveguides. In order to bring optical waveguide technology into mainstream product development plans, however, numerous challenges on many levels have to be met. Problems to be tackled span from the base level of materials (stability, processability) and devices (reliability, lifetime), over the subsystem level of packages (concepts, cost-efficient assembly and alignment) all the way up to the system level (link architecture, system packaging, heat management). A sustainable solution can only be reached if the development of all individual technology components is done with the whole system in mind. Important figures of merit are the cost per gigabit per second, the power per gigabit per second, and the maturity/reliability of the technology. We will give an overview of our optical interconnect activity, with respect to these challenges. We will discuss the options, explain our technology decisions and present some results of our multi-disciplinary activity.
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