Creat membership Creat membership
Sign in

Forgot password?

Confirm
  • Forgot password?
    Sign Up
  • Confirm
    Sign In
Creat membership Creat membership
Sign in

Forgot password?

Confirm
  • Forgot password?
    Sign Up
  • Confirm
    Sign In
Collection

toTop

If you have any feedback, Please follow the official account to submit feedback.

Turn on your phone and scan

home > search >

A 5-bit 400-MS/s time domain flash ADC in 0.18-mu m CMOS

Author:
Lin, Yu-Chuan  Tsao, Hen-Wai  


Journal:
ANALOG INTEGRATED CIRCUITS AND SIGNAL PROCESSING


Issue Date:
2020


Abstract(summary):

A 5-bit 400-MHz time-domain analog-to-digital converter (ADC) was implemented in 0.18-mu m CMOS technology. The proposed design is composed of a voltage-to-time-difference converter, a flash-type time-to-digital converter, and some error correction logic. Input voltage-type signals are converted to time-difference signals by a voltage-to-time-difference converter. Its rising- and falling-edge outputs contain delay information; they can then be converted by two time-to-digital converters operating at interleaving clock phases. Because of the transparent delayed signal without a sample-and-hold circuit, the subsequent time-to-digital converter structure is of the flash type. By using a distinct RC time constant of the time comparator, the time-difference signals can be converted to the relevant 1-of-n code. Because this conversion is almost entirely digital in nature, little static current is consumed. The measured signal to noise and distortion ratio and spurious-free dynamic range of the ADC are 26.1 dB and 31.5 dB, respectively, at a 400-MHz sampling frequency for a 100-MHz input signal.


Page:
369---378


Similar Literature

Submit Feedback

This function is a member function, members do not limit the number of downloads