IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS
Issue Date:
2019
Abstract(summary):
A new design methodology providing optimal mixed-mode operation for dual-input class-F outphasing Chireix amplifiers is presented. The design starts with single-transistor class-F simulations at the intrinsic I-V reference planes to directly select the optimal peak and backoff resistive loads R-min and R-max and input RF gate drives yielding the best combination of efficiencies and output powers without needing to perform a load pull simulation or measurement. New analytic equations expressed only in terms of R-min and R-max are given for designing the Chireix combiner at the current source reference planes. Nonlinear embedding is then used to predict the incident power and multi-harmonic source and load impedances required at the package reference planes to physically implement the power amplifier (PA). An analytic formula solely expressed in terms of R-min and R-max is reported for the peak and backoff outphasing angles required at the PA input reference planes. A Chireix outphasing PA is designed using two 15-W GaN HEMTs. A Chireix outphasing PA exhibits a peak efficiency of 72.58% with peak power of 43.97 dBm and a 8-dB backoff efficiency of 75.22% at 1.9 GHz. Measurements with 10-MHz LTE signals with 9.6-dB PAPR yield 59.4% average drain efficiency at 1.9 GHz while satisfying the 3GPP linearity requirements.
Page:
1594---1607
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