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3.3-kV-Class 4H-SiC MeV-Implanted UMOSFET With Reduced Gate Oxide Field

Author:
Harada, Shinsuke  Kobayashi, Yusuke  Ariyoshi, Keiko  Kojima, Takahito  Senzaki, Junji  Tanaka, Yasunori  Okumura, Hajime  


Journal:
IEEE ELECTRON DEVICE LETTERS


Issue Date:
2016


Abstract(summary):

A critical issue for SiC trench gate metal-oxide-semiconductor field-effect transistors (UMOSFETs) is gate oxide shielding from the electric field at the trench bottom. In this letter, low ON-resistance with low gate electric field was achieved in a 3.3-kV-class UMOSFET with a unique hexagonal buried p-base region formed by MeV ion implantation. The shielding effect was further enhanced by a self-aligned trench bottom shielding region. The specific ON-resistance, with and without the trench bottom shielding region, was 8.3 and 9.4 m Omega cm(2), respectively. The blocking voltage in each case was similar to 3800 V. The electric field in the gate oxide with the trench bottom shielding region was reduced to 2.5 MV/cm at 3300 V.


Page:
314---316


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