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1-T Capacitorless DRAM Using Bandgap-Engineered Silicon-Germanium Bipolar I-MOS

Author:
Lahgere, Avinash  Kumar, Mamidala Jagadesh  


Journal:
IEEE TRANSACTIONS ON ELECTRON DEVICES


Issue Date:
2017


Abstract(summary):

In this paper, a 1-Transitor (1-T) capacitorless dynamic random access memory (DRAM) using bandgap-engineered silicon-germanium Bipolar ionization metal oxide semiconductor field effect transistor (I-MOS) is investigated through numerical simulations. We have demonstrated the application of the proposed Si0.6Ge0.4 Bipolar I-MOS for realization of a 1-T capacitorless DRAM. The proposed device can achieve hysteresis at significantly lower drain voltages (V-LD =3D 0.45 V to V-LU =3D1.15 V), in comparison to the inversion mode device (V-LD =3D 8 V to V-LU =3D 11 V). In addition, the proposed 1-T capacitorless DRAM exhibits a wider hysteresis window (Delta V) of the order similar to 700 mV and a sensing margin (M) of similar to 5 orders in comparison to the inversion mode based 1-T capacitorless DRAM. Moreover, the proposed 1-T capacitorless DRAM exhibits the retention time of similar to 750 msec and similar to 320 msec for T =3D 25 degrees C and T =3D 85 degrees C, respectively. The proposed 1-T capacitorless DRAM also shows nondestructive read and an extreme long-term endurance. Therefore, the results presented in this paper can provide an opportunity for future DRAM design in deep nanometer technology.


Page:
1583---1590


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