A low-power 5-GHz CMOS RF receiver for WLAN applications

Author:

Cha, Minyeon  Kwon, Ickjin  

Journal:

MICROWAVE AND OPTICAL TECHNOLOGY LETTERS

Issue Date:

2012

Abstract(summary):

A low-power 5-GHz IEEE 802.11a CMOS RF receiver for wireless local area network is designed.For low-power dissipation, a dual conversion current-driven passive mixer is used in an RF front-end. An optimum allocation of alternated low-pass filters and amplifiers in a baseband analog chain is also performed. The receiver is fabricated in 0.13 mu m 1-poly 6-metal CMOS technology. The fully integrated receiver achieves 90.5 dB maximum gain, 7.1 dB noise figure, and -20 dBm input-referred third-order intercept point. The chip area is 3.25 mm2 and it consumes a power of 40.8 mW from a supply voltage of 1.2 V. (c) 2012 Wiley Periodicals, Inc. Microwave Opt Technol Lett 54:842847, 2012; View this article online at wileyonlinelibrary.com. DOI 10.1002/mop.26700

Page:

842---847