This study presents the structural characterization of the surface of four commercial nanofiltration membranes: NF90 (polyamide) and NF (polypiperazine amide) from Filmtec(TM) and NP010 and NP030 (polysulfone) from Microdyn Nadir(A (R)), by Atomic Force Microscopy (AFM). These membranes have been studied before and after undergoing a filtration process with potassium clavulanate. The fast Fourier filtering of AFM images with very high magnification (40 x 40 nm) has allowed identifying the pore size distribution and geometry of the pores on the surface of the membrane before their use. Images between 0.5 x 0.5 and 10 x 10 mu m(2) have allowed the study of the surface roughness of the samples before and after being used to filtrate potassium clavulanate solutions. The results of roughness and power spectral fractal dimension along with the skewness and kurtosis of the height distribution have been analyzed in terms of pore size, hydraulic permeability, and the adsorption of clavulanate for the different samples.

An efficient multistage polyphase magnitude modulation (MPMM) scheme was recently proposed to solve the problem of controlling the envelope's power peak of single carrier modulated signals, band limited by root-raised cosine (RRC) pulse shaping filters, in order to maximize the efficiency of the transmitter's high power amplifier (HPA). This paper addresses the statistical analysis of MPMM coefficients and performs an analytical study of the average power and the peak-to-average power ratio (PAPR) of the magnitude modulated transmitted signals. It is shown that the average power losses due to MPMM are largely compensated by the outstanding back-off reduction gains, leading to an effective reduction on the transmitted signal's PAPR. The analytical study also shows that these losses are comparable to those observed with the clipping method (less than 1dB), without generating the undesirable spectral regrowth effect.

In this work, a process has been designed for the purification of fructooligosaccharides obtained by enzymatic transformation of sucrose from sugar cane molasses. The designed protocol includes two nanofiltration stages with the same membrane. The first one is a diafiltration process, at constant volume followed by concentration. The second stage consists in the nanofiltration of the permeate of the first stage to obtain a concentrate similar in its characteristics to the initial solution. The process allows getting purities over 90% in fructooligosaccharides with yields around 80%. These processes are studied and modeled, by taking into account the effects of the resulting osmotic pressure and the changes in resistance due to solute adsorption on the membrane. The transport is modeled by assuming that there are diffusion and convection but hindered by friction in the pore. The steric partitioning, along with an adequate mass balance for the differently sized molecules have also been considered leading to get the pore size distribution of the membrane. (C) 2010 Elsevier B.V. All rights reserved.

Due to huge computational requirements, powerful Low-Density Parity-Check (LDPC) error correcting codes, discovered in the early 1960s, have only recently been adopted by emerging communication standards. LDPC decoders are supported by VLSI technology, which delivers good parallel computational power with excellent throughputs, but at the expense of significant costs. In this work, we propose an alternative flexible LDPC decoder that exploits data-parallelism for simultaneous multi-codeword decoding, supported by multithreading on CUDA-based graphics processing units (GPUs). The ratio of arithmetic operations per memory access is low for the efficient min-sum LDPC decoding algorithm proposed, which causes a bottleneck due to memory latency and data collisions. We propose runtime data realignment to allow coalesced parallel memory accesses to be performed by distinct threads inside the same warp. The memory access patterns of LDPC codes are random, which does not admit the simultaneous use of coalescence in both read and write operations of the decoding process. To overcome this problem we have developed a data mapping transformation which allows new addresses to be contiguously accessed for one of the mentioned memory access types. Our implementation shows throughputs above 100 Mbps and BER curves that compare well with ASIC solutions.